Clock cycles for integer multiplication and division

mul and imul (one-operand form)

The actual number of clock cycles depends on numbers being multiplied.
Destin. 386 486 Pentium
reg8 9-14 13-18 11
reg16 9-22 13-26 11
reg32 9-38 13-42 10
mem8 12-17 13-18 11
mem16 12-25 13-26 11
mem32 12-41 13-42 11

div

Destin. 386 486 Pentium
reg8 14 16 17
reg16 22 24 25
reg32 38 40 41
mem8 17 16 17
mem16 25 24 25
mem32 41 40 41

idiv

Destin. 386 486 Pentium
reg8 19 19 22
reg16 27 27 30
reg32 43 43 48
mem8 22 20 22
mem16 30 28 30
mem32 46 44 48